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www.austriamicrosystems.com/dc-dc_step-up/as1310 revision 1.8 1 - 19 datasheet as1310 ultra low quiescent current, hyst eretic dc-dc step-up converter 1 general description the as1310 is an ultra low i q hysteretic step-up dc-dc converter optimized for light loads (60ma), where it achieves efficiencies of up to 92%. as1310 operates from a 0.7v to 3.6v supply and supports output vo ltages between 1.8v and 3.3v. besides the available as1310 standard variants any variant with output voltages in 50mv steps are available. see ordering information on page 18 for more information. if the input voltage exceeds the output voltage the device is in a fee d-through mode and the input is directly connected to the output voltage. in light load operation, the device enters a sleep mode when most of the internal operating blocks are turned off in order to save power. this mode is active approximately 50s after a current pulse provided that the output is in regulation. in order to save power the as1310 features a shutdown mode, wh ere it draws less than 100na. during shutdown mode the battery is disconnected from the output. the as1310 also offers adjustable low battery detection. if the bat tery voltage decreases below the threshold defined by two external resistors on pin lbi, the lbo output is pulled to logic low. the as1310 is available in a tdfn (2x2) 8-pin package. figure 1. as1310 typical application diagram 2 key features ?? input voltage range: 0.7v to 3.6v ?? fixed output voltage range: 1.8v to 3.3v ?? output current: 60ma @ v in =0.9v, v out =1.8v ?? quiescent current: 1a (typ.) ?? shutdown current: < 100na ?? up to 92% efficiency ?? output disconnect in shutdown ?? feedthrough mode when v in > v out ?? adjustable low battery detection ?? no external diode or transistor required ?? over temperature protection ?? tdfn (2x2) 8-pin package 3 applications the as1310 is an ideal solution for single and dual cell powered devices as blood glucose meters, remote controls, hearing aids, wireless mouse or any light-load application. v in 0.7v to 3.6v as1310 c 2 22f on off c 1 22f gnd 2 v out 1.8v to 3.3v 7 en 8 vin 4 vout 6 lbo 1 lbi r 3 low battery detect r 1 r 2 l1 6.8h lx 3 c ref 100nf 5 ref ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-up/as1310 revision 1.8 2 - 19 as1310 datasheet - pin assignments 4 pin assignments figure 2. pin assignments (top view) 4.1 pin descriptions table 1. pin descriptions pin number pin name description 1l b i l ow battery comparator input . 0.6v threshold. may not be left floating. if connected to gnd, lbo is working as power output ok. 2g n d ground 3l x external inductor connector. 4v o u t output v oltage. decouple vout with a ceramic capacitor as close as possible to vout and gnd . 5r e f reference pin. connect a 100nf ceramic capacitor to this pin. 6l b o low battery comparator output . open-drain output. 7e n enable pin . logic controlled shutdown input. 1 = normal operation; 0 = shutdown; shutdown current <100na. 8v i n battery voltage input. decouple vin with a 22f ceramic capacitor as close as possible to vin and gnd. 9n c exposed pad. this pad is not connected internally. can be left floating or connect to gnd to achieve an optimal thermal performance. as1310 1 2 4 3 8 7 5 6 lbi gnd vout lx vin en ref lbo exposed pad ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-up/as1310 revision 1.8 3 - 19 as1310 datasheet - absolute maximum ratings 5 absolute maximum ratings stresses beyond those listed in table 2 may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in electrical characteristics on page 4 is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. table 2. absolute maximum ratings parameter min max units comments electrical parameters vin, vout, en, lbi, lbo to gnd -0.3 +5 v lx, ref to gnd -0.3 v out + 0.3 v input current (latch-up immunity) -100 100 ma norm: jedec 78 electrostatic discharge electrostatic discharge hbm 2 kv norm: mil 883 e method 3015 temperature ranges and storage conditions thermal resistance ja 58 oc/w junction temperature +125 oc storage temperature range -55 +125 oc package body temperature +260 oc the reflow peak soldering temperature (body temperature) specified is in accordance with ipc/ jedec j-std-020?moisture/reflow sensitivity classification for non-hermetic solid state surface mount devices?. the lead finish for pb-free leaded packages is matte tin (100% sn). humidity non-condensing 5 85 % moisture sensitive level 1 represents a maximum floor life time of unlimited ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-up/as1310 revision 1.8 4 - 19 as1310 datasheet - electrical characteristics 6 electrical characteristics all limits are guaranteed. the parameters with min and max values are guaranteed by production tests or sqc (statistical qualit y control) methods. v in = 1.5v, c1 = c2 = 22f, c ref = 100nf, typical values are at t amb = +25oc (unless otherwise specified) . all limits are guaranteed. the parameters with min and max values are guaranteed with production tests or sqc (statistical quality control) methods. table 3. electrical characteristics symbol parameter conditions min typ max units t amb operating temperature range -40 +85 c input v in input voltage range 0.7 3.6 v minimum startup voltage i load = 1ma, t amb = +25c 0.7 0.8 v regulation v out output voltage range 1.8 3.3 v output voltage tolerance i load = 10 ma, t amb = +25c -2 +2 % i load = 10ma -3 +3 % v out lockout threshold 1 rising edge 1.55 1.65 1.75 v operating current i q quiescent current v in v out = 1.02xv outnom , ref = 0.99xv outnom , t amb = +25c 100 na quiescent current v out v out = 1.02xv on , ref = 0.99xv on , no load, t amb = +25c 0.8 1 1.2 a i shdn shutdown current t amb = +25oc 100 na switches r on nmos v out = 3v 0.35 pmos 0.5 nmos maximum on-time 3.6 4.2 4.8 s i peak peak current limit 320 400 480 ma zero crossing current 5 20 35 ma enable, reference v enh en input voltage high 0.7 v v enl en input voltage low 0.1 v i en en input bias current en = 3.6v, t amb = +25c 100 na i ref ref input bias current ref = 0.99xv outnom , t amb = +25c 100 na low battery & power-ok v lbi lbi threshold falling edge 0.57 0.6 0.63 v lbi hysteresis 25 mv i lbi lbi leakage current lbi = 3.6v, t amb = +25c 100 na v lbo lbo voltage low 2 i lbo = 1ma 20 100 mv i lbo lbo leakage current lbo = 3.6v, t amb = +25c 100 na power-ok threshold lbi = 0v, falling edge 90 92.5 95 % ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-up/as1310 revision 1.8 5 - 19 as1310 datasheet - electrical characteristics thermal protection thermal shutdown 10c hysteresis 150 c 1. the regulator is in startup mode until this voltage is reac hed. caution: do not apply full load current until the device outp ut > 1.75v 2. lbo goes low in startup mode as well as during normal operation if: - the voltage at the lbi pin is below lbi threshold. - the voltage at the lbi pin is below 0.1v and v out is below 92.5% of its nominal value. table 3. electrical characteristics symbol parameter conditions min typ max units ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-up/as1310 revision 1.8 6 - 19 as1310 datasheet - typical operating characteristics 7 typical operating characteristics t amb = +25c, unless otherwise specified. figure 3. efficiency vs. output current; v out = 1.8v figure 4. efficiency vs. output current; v out = 1.8v 40 45 50 55 60 65 70 75 80 85 90 0.01 0.1 1 10 100 1000 output current (ma) efficiency (%) vin = 0.9v vin = 1.2v v in = 1.5v l1: xpl2010-682m 40 45 50 55 60 65 70 75 80 85 90 0.01 0.1 1 10 100 1000 output current (ma) efficiency (%) vin = 0.9v vin = 1.2v v in = 1.5v l1: xpl7030-682m figure 5. efficiency vs. output current; v out = 3.0v figure 6. efficiency vs. output current; v out = 3.0v 40 45 50 55 60 65 70 75 80 85 90 95 100 0.01 0.1 1 10 100 1000 output current (ma) efficiency (%) vin = 0.9v vin = 1.2v v in = 1.5v vin = 1.8v vin = 2.4v l1: xpl2010-682m 40 45 50 55 60 65 70 75 80 85 90 95 100 0.01 0.1 1 10 100 1000 output current (m a) efficiency (%) vin = 0.9v vin = 1.2v v in = 1.5v vin = 1.8v vin = 2.4v l1: xpl7030-682m figure 7. efficiency vs. input voltage; v out = 1.8v figure 8. maximum output current vs. input voltage 50 55 60 65 70 75 80 85 90 95 100 0.7 0.9 1.1 1.3 1.5 1.7 1.9 input voltage (v) efficiency (%) iout = 1ma iout =10 ma iout =50ma l1: xpl2010-682m 0 20 40 60 80 100 120 140 160 180 0 0.5 1 1.5 2 2.5 3 input voltage (v) output current (ma) . vout = 1.8v vout = 3.0v ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-up/as1310 revision 1.8 7 - 19 as1310 datasheet - typical operating characteristics figure 9. start-up voltage vs. output current figure 10. r on vs. temperature 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 1 012345678910 output current (ma) start-up voltage (v) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 -40 -15 10 35 60 85 temperature (c) r on ( ) pm os nm os figure 11. output voltage ripple; v in = 2v, v out = 3v, r load = 100 5s/div i lx 200ma/div 2v/div 100mv/div v lx v out (ac) ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-up/as1310 revision 1.8 8 - 19 as1310 datasheet - detailed description 8 detailed description 8.1 hysteretic boost converter hysteretic boost converters are so called because comparators are the active elements used to determine on-off timing via current and voltage measurements. there is no continuously operating fixed oscillator, providing an independent timing reference. as a result, a hy steretic or comparator based converter has a very low quiescent current. in addition, because there is no fixed timing reference, the opera ting frequency is determined by external component (inductor and capacitors) and also the loading on the output. ripple at the output is an essential operating component. a power cycle is initiated when the output regulated voltage drops be low the nominal value of v out (0.99 x v out ). inductor current is monitored by the control loop, ensuring that operation is always dis-continuous. the application circuit shown in figure 1 will support many requirements. however, further optimization may be useful, and the following is offered as a guide to changing the passive components to more closely match the end requirement. 8.1.1 input loop timing the input loop consists of the source dc supply, the input capacitor, the main inductor, and the n-channel power switch. the on timing of the n- channel switch is determined by a peak current measurement or a maximum on time. in the as1310, peak current is 400ma (typ) and maximum on time is 4.2s (typ). peak current measurement ensures that the on time varies as the input voltage varies. this imparts line regulation to the converter. the fixed on-time measurement is something of a safety feature to ensure that the power switch is never permanently on. the fixed o n-time is independent of input voltage changes. as a result, no line regulation exists. figure 12. simplified boost dcdc architecture on time of the power switch (faraday?s law) is given by: sec [volts, amps, ohms, henry] (eq 1) applying min and max values and neglecting the resistive voltage drop across l1 and sw1; (eq 2) (eq 3) sw1 sw2 c in c out l1 r load v in v out 0v 0v q q fb gnd i pk t on li pk v in i pk r sw 1 i pk r l 1 + () ? ----------------------------------------------------------------- - = maxin minpkmin minon v il t _ _ _ = minin maxpkmax maxon v il t _ _ _ = ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-up/as1310 revision 1.8 9 - 19 as1310 datasheet - detailed description figure 13. simplified voltage and current waveforms another important relationship is the ?volt-seconds? law. expressed as following: (eq 4) voltages are those measured across the inductor during each time segment. figure 13 shows this graphically with the shaded segments marked ?a & b?. re-arranging (eq 4) : (eq 5) the time segment called t wait in figure 13 i s a measure of the ?hold-up? time of the output capacitor. while the output voltage is above the threshold (0.99xv out ), the output is assumed to be in regulation and no further switching occurs. 8.1.2 inductor choice example for the as1310 v in_min = 0.9v, v out_max = 3.3v, (eq 5) gives ton=2.66t off . let the maximum operating on-time = 1s. note that this is shorter than the minimum limit on-time of 3.6s. therefore from (eq 5) , t off = 0.376s. using (eq 3) , l max is obtained: l max = 1.875h. the nearest preferred value is 2.2h. this value provides the maximum energy storage for the chosen fixed on-time limit at the minimum v in . i pk t t v out v in 0 0 t wait t off t on t wait t off sw1_on sw2_off sw1_off sw2_on v i l v ind_ton v ind_toff t c bb a t c d d v out ripple 0.99v out_nom v on t on v off t off = t on t off ------------ - v out v in ? v in ---------------------------- = ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-up/as1310 revision 1.8 10 - 19 as1310 datasheet - detailed description energy stored during the on time is given by: joules (region a in figure 13 )( e q 6 ) if the overall time period (t on + t off ) is t, the power taken from the input is: watts (eq 7) assume output power is 0.8 p in to establish an initial value of operating period t. t wait is determined by the time taken for the output voltage to fall to 0.99xv out . the longer the wait time, the lower will be the supply current of the converter. longer wait times require increased output capacitance. choose t wait = 10% t as a minimum starting point for maximum energy transfer. for very low power load applications, choose t wait 50% t. 8.1.3 output loop timing the output loop consists of the main inductor, p-channel synchronous switch (or diode if fitted), output capacitor and load. wh en the input loop is interrupted, the voltage on the lx pin rises (lenz?s law). at the same time a comparator enables the synchronous switch, and en ergy stored in the inductor is transferred to the output capacitor and load. inductor peak current supports the load and replenishes the charg e lost from the output capacitor. the magnitude of the current from the inductor is monitored, and as it approaches zero, the synchronous switc h is turned off. no switching action continues until the output voltage falls below the output reference point (0.99 x v out ). output power is composed of the dc component (region c in figure 13 ): p region_c = (eq 8) output power is also composed of the inductor component (region b in figure 13 ), neglecting efficiency loss: p region_b = (eq 9) total power delivered to the load is the sum of (eq 8) and (eq 9) : (eq 10) from (eq 3) (using nominal values) peak current is given by: (eq 11) substituting (eq 11) into (eq 10) and re-arranging: (eq 12) 0.9t incorporates a wait time t wait = 10% t output power in terms of regulated output voltage and load resistance is: (eq 13) combining (eq 12) and (eq 13) : (eq 14) symbol reflects total energy loss between input and output and is approximately 0.8 for these calculations. use (eq 14) to plot duty cycle (t on /t) changes for various output loadings and changes to v in . e 0.5 li pk () 2 = p in 0.5 li pk () 2 t --------------------------- = v in i pk 2 -------- t off t ------------ - 0.5 li pk () 2 t --------------------------- p total v in i pk 2 -------- t off t ------------ - 0.5 li pk () 2 t --------------------------- + = i pk t on v in l ------------------- = p total v 2 in t on 2 tl --------------------- - 0.9 t () = p out v 2 out r load ---------------- - = v 2 out r load ---------------- - v 2 in t on 2 tl --------------------- - 0.9 t () = ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-up/as1310 revision 1.8 11 - 19 as1310 datasheet - detailed description 8.1.4 input capacitor selection the input capacitor supports the triangular current during the on- time of the power switch, and maintains a broadly constant in put voltage during this time. the capacitance value is obtained from choosing a ripple voltage during the on-time of the power switch. additionally, ripple voltage is generated by the equivalent series resistance (esr) of the capacitor. for worst case, use maximum peak current values from the datasheet. (eq 15) using t on = 1s, and i peak = 480ma, and v ripple = 50mv, eq 15 yields: c in = 9.6f nearest preferred would be 10f. (eq 16) typically, the ripple due to esr is not dominant. esr for the recommended capacitors (murata gmr), esr = 5m to 10m . for the as1310, ma ximum peak current is 480ma. ripple due to esr is 2.4mv to 4.8mv. ripple at the input propagates through the common supply connections, and if too high in value can cause problems elsewhere in the s ystem. the input capacitance is an important component to get right. 8.1.5 output cap acitor selection the output capacitor supports the triangular current during the off-time of the power switch (inductor discharge period), and also the load current during the wait time (region d in figure 13 ) and on-time (region a in figure 13 ) of the power switch. (eq 17) note: there is also a ripple component due to the equivalent series resistance (esr) of the capacitor. 8.2 summary user application defines: v in min, v in max, v out min, v out max, i load min, i load max inductor selection: select max on-time = 0.5s to 3s for as1310. use (eq 3) to calculate inductor value. use (eq 5) to determine off-time. use (eq 6) to check that power delivery matches load requirements assume 70% conversion efficiency. use (eq 13) to find overall timing period value of t at min v in and max v out for maximum load conditions. input capacitor selection: choose a ripple value and use (eq 14) to find the value. output capacito r selection: determine t wait via (eq 6) or (eq 13) , and use (eq 16) to find the value. c in i peak t on v ripple ------------------------- = esrpk esr ripple pk ri v = )( )( ? + = ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-up/as1310 revision 1.8 12 - 19 as1310 datasheet - application information 9 application information the as1310 is available with fixed output voltages from 1.8v to 3.3v in 50mv steps. figure 14. as1310 block diagram 9.1 as1310 features shutdown. the part is in shutdown mode while the voltage at pin en is below 0.1v and is active when the voltage is higher than 0.7v. note: en can be driven above v in or v out , as long as it is limited to less than 3.6v. output disconnect an d inrush limiting. during shutdown v out is going to 0v and no current from the input source is running through the device. this is true as long as the input voltage is higher than the output voltage. feedthrough mode. if the input voltage is higher than the output voltage the supply voltage is connected to the load through the device. to guarantee a proper function of the as1310 it is not allowed that the supply exceeds the maximum allowed input voltage (3.6v). in this feedthrough mode the quiescent current is 35a (typ.). the device goes back into step-up mode when the oputput voltage is 4% (typ.) be low v outnom . zero crossing detector as1310 driver and control logic startup circuitry 6.8h 0.7 to 3.6v input imax detection c in 22f + ? 1.8v to 3.3v output c out 22f lx en vout gnd v ref ref lbo r 3 vin lbi c ref 100nf ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-up/as1310 revision 1.8 13 - 19 as1310 datasheet - application information 9.1.1 power-ok and low-battery-detect functionality lbo goes low in startup mode as well as during normal operation if: - the voltage at the lbi pin is below lbi threshold (0.6v). this can be used to monitor the battery voltage. - lbi pin is connected to gnd and v out is below 92.5% of its nominal value. lbo works as a power-ok signal in this case. the lbi pin can be connected to a resistive-divider to monitor a particular definable voltage and compare it with a 0.6v intern al reference. if lbi is connected to gnd an internal resistive-divider is activated and connected to the output. therefore, the power-ok functionali ty can be realized with no additional external components. the power-ok feature is not active during shutdown and provides a power-on-reset function that can operate down to v in = 0.7v. a capacitor to gnd may be added to generate a power-on-reset delay. to obtain a logic-level output, connect a pull-up resistor r 3 from pin lbo to pin vout. larger values for this resistor will help to minimize current consumption; a 100k resistor is perfect for most applications (see figure 16 on page 13) . for the circuit shown in the left of figure 15 , the input bias current into lbi is very low, per m itting large-value resistor-divider networks while maintaining accuracy. place the resistor-divider network as close to the device as possible. use a defined resistor for r 2 and then calculate r 1 as: (eq 18) where: v lbi is 0.6v 30mv figure 15. typical application with adjustable battery monitoring fig ure 16. typical application with lbo working as power-ok r 1 r 2 v in v lbi ----------- 1 ? ?? ?? ? = v in 0.7v to 3.6v as1310 c 2 22f on off c 1 22f gnd 2 v out 1.8v to 3.3v 7 en 8 vin 4 vout 6 lbo 1 lbi r 3 low battery detect r 1 r 2 l1 6.8h lx 3 c ref 100nf 5 ref v in 0.7v to 3.6v as1310 c 2 22f on off c 1 22f gnd 2 v out 1.8v to 3.3v 7 en 8 vin 4 vout 6 lbo 1 lbi r 3 low battery detect l1 6.8h lx 3 c ref 100nf 5 ref ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-up/as1310 revision 1.8 14 - 19 as1310 datasheet - application information 9.1.2 thermal shutdown to prevent the as1310 from short-term misuse and overload conditions the chip includes a thermal overload protection. to block the normal operation mode all switches will be turned off. the device is in thermal shutdown when the junction temperature exceeds 150c. to resume the normal operation the temperature has to drop below 140c. a good thermal path has to be provided to dissipate the heat generated within the package. otherwise it?s not possible to opera te the as1310 at its usable maximal power. to dissipate as much heat as possible from the package into a copper plane with as much area as possi ble, it?s recommended to use multiple vias in the printed circuit board. it?s also recommended to solder the exposed pad (pin 9) to the g nd plane. note: conti nuing operation in thermal overload conditions may damage the device and is considered bad practice. 9.2 always on operation in battery powered applications with long standby times as blood glucose meters, remote controls, soap dispensers, etc., a care ful battery management is required. normally a complex power management control makes sure that the dcdc is only switched on, when it is re ally needed. with as1310 this complex control can be saved completely, since the as1310 is perfectly suited to support always-on ope rations of the application. the efficiency at standby currents of e.g. 2as is around 45% (see figure 17) . figure 17. efficiency vs. output current for always on operation 9.3 component selection only four components are required to complete the design of the step-up converter. the low peak currents of the as1310 allow th e use of low value, low profile inductors and tiny external ceramic capacitors. 9.4 inductor selection for best efficiency, choose an inductor with high frequency core ma terial, such as ferrite, to reduce core losses. the inductor should have low dcr (dc resistance) to reduce the i2r losses, and must be able to handle the peak inductor current without saturating. a 6.8h inductor with a >500ma current rating and <500m dcr is recommended. table 4. recommended inductors part number l dcr current rating dimensions (l/w/t) manufacturer xpl2010-682m 6.8h 421m 0.62a 2.0x1.9x1.0 mm coilcraft www.coilcraft.com epl2014-682m 6.8h 287m 0.59a 2.0x2.0x1.4 mm lps3015-682m 6.8h 300m 0.86a 3.0x3.0x1.5 mm LPS3314-682M 6.8h 240m 0.9a 3.3x3.3x1.3 mm lps4018-682m 6.8h 150m 1.3a 3.9x3.9x1.7 mm xpl7030-682m 6.8h 59m 9.4a 7.0x7.0x3.0 mm 0 10 20 30 40 50 60 70 80 90 100 0.001 0.01 0.1 1 10 100 output current (m a) efficiency (%) vin = 1.1v v in = 1.5v l1: xpl2010-682m ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-up/as1310 revision 1.8 15 - 19 as1310 datasheet - application information 9.5 capacitor selection the convertor requires three capacitors. ceramic x5r or x7r types will minimize esl and esr while maintaining capacitance at ra ted voltage over temperature. the v in capacitor should be 22f. the v out capacitor should be between 22f and 47f. a larger output capacitor should be used if lower peak to peak output voltage ripple is desired. a larger output capacitor will also improve load regulation on v out . see table 5 for a list of capacitors for input and output capacitor selection. on the pin ref a 10nf capacitor with an insulation resistance >1g is recommended. 9.6 layout considerations relatively high peak currents of 480ma (max) circulate during normal operation of the as1310. long printed circuit tracks can g enerate additional ripple and noise that mask correct operation and prove difficult to ?de-bug? during production testing. referring to figure 1 , the input loop formed by c1, vin and gnd pins should be minimized. similarly, the output loop formed by c2, vout and gnd should also be m in imized. ideally both loops should connect to gnd in a ?star? fashion. finally, it is important to return c ref to the gnd pin directly. lqh32cn6r8m53l 6.8h 250m 0 .54a 3.2x2.5x1.55 mm murata www.murata.com lqh3npn6r8nj0l 6.8h 210m 0.7a 3.0x3.0x1.1 mm lqh44pn6r8mj0l 6.8h 143m 0.72a 4.0x4.0x1.1 mm table 5. recommended input and output capacitors part number c tc code rated voltage dimensions (l/w/t) manufacturer grm21br60j226me99 22f x5r 6.3v 0805, t=1.25mm murata www.murata.com grm31cr61c226ke15 22f x5r 16v 1206, t=1.6mm grm31cr60j475ka01 47f x5r 6.3v 1206, t=1.6mm table 6. recommended capacitors for ref part number c tc code insulation resistance rated voltage dimensions (l/w/t) manufacturer grm188r71c104ka01 100nf x7r >5g 16v 0603, t=0.8mm murata www.murata.com grm31cr61c226ke15 100nf x7r >5g 50v 0805, t=1.25mm table 4. recommended inductors part number l dcr current rating dimensions (l/w/t) manufacturer ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-up/as1310 revision 1.8 16 - 19 as1310 datasheet 10 package drawin gs and markings the device is available in a tdfn (2x2) 8-pin package. figure 18. drawings and dimensions no tes: 1. dimensioning & tolerancing conform to asm e y14.5m-1994 . 2. all dimensions are in millimeters. angles are in degrees. 3. coplanarity applies to the exposed heat slug as well as the terminal. 4. radius on terminal is optional. 5. n is the total number of terminals. symbol min nom max a 0.51 0.55 0.60 a1 0.00 0.02 0.05 a3 0.15 ref l 0.225 0.325 0.425 b 0.18 0.25 0.30 d 2.00 bsc e 2.00 bsc e 0.50 bsc d2 1.45 1.60 1.70 e2 0.75 0.90 1.00 aaa - 0.15 - bbb - 0.10 - ccc 0.10 - ddd - 0.05 - eee - 0.08 - fff - 0.10 - n8 x x x a2 ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-up/as1310 revision 1.8 17 - 19 as1310 datasheet - package drawings and markings revision history note: typos may not be explicitly mentioned under revision history. revision date owner description 1.0 afe initial revision 1.6 06 mar, 2012 updated detailed description and application information sections 1.7 27 apr, 2012 detailed description section updated 1.8 17 aug, 2012 updated thermal resistance value and (eq 17) ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-up/as1310 revision 1.8 18 - 19 as1310 datasheet - ordering information 11 ordering information the device is available as the standard products shown in table 7 . note: all products are rohs compliant and austriamicrosystems green. buy our products or get free samples online at icdirect: http://www.austriamicr osystems.co m/icdirect technical support is available at http://www.austriamicrosystems.com/technical-support for further information and requests, please contact us mailto:sales@austriamicrosystems.com or find your local distributor at http://www.austriamicros ystems.co m/distributor table 7. ordering information ordering code marking output description delivery form package as1310-btdt-18 a2 1.8v ultra low quiescent current, hysteretic dc-dc step-up converter tape and reel tdfn (2x2) 8-pin as1310-btdt-20 a8 2.0v tape and reel tdfn (2x2) 8-pin as1310-btdt-25 a9 2.5v tape and reel tdfn (2x2) 8-pin as1310-btdt-27 a7 2.7v tape and reel tdfn (2x2) 8-pin as1310-btdt-30 a6 3.0v tape and reel tdfn (2x2) 8-pin as1310-btdt-33 1 1. on request tbd 3.3v tape and reel tdfn (2x2) 8-pin as1310-btdt-xx 2 2. non-standard devices are available between 1.8v and 3.3v in 50mv steps. tbd tbd tape and reel tdfn (2x2) 8-pin ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-up/as1310 revision 1.8 19 - 19 as1310 datasheet - ordering information copyrights copyright ? 1997-2012, austriamicrosystems ag, tobelbaderstrasse 30, 8141 unterpremstaetten, austria-europe. trademarks registe red ?. all rights reserved. the material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. all products and companies mentioned are trademarks or registered trademarks of their respective companies. disclaimer devices sold by austriamicrosystems ag are covered by the warranty and patent indemnification provisions appearing in its term of sale. austriamicrosystems ag makes no warranty, express, statutory, implied, or by description regarding the information set forth he rein or regarding the freedom of the described devices from patent infringement. au striamicrosystems ag reserves the right to change specificatio ns and prices at any time and without notice. therefore, prior to designing this product into a system, it is necessary to check with austriamic rosystems ag for current information. this product is intended for use in normal commercial applications. applications requiring extended temper ature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems ag for each application. for shipments of les s than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. the information furnished here by austriamicrosystems ag is believed to be correct and accurate. however, austriamicrosystems ag shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. no obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems ag rendering of technical or other services. contact information headquarters austriamicrosystems ag tobelbaderstrasse 30 a-8141 unterpremstaetten, austria tel: +43 (0) 3136 500 0 fax: +43 (0) 3136 525 01 for sales offices, distributors and representatives, please visit: http://www.austriamicrosystems.com/contact ams ag technical content still valid

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